The present disclosure generally relates to computer systems, and more specifically, to fetching data from memory for processing instructions.
Computer processing cores fetch data from memory to be used for processing instructions. Once the data is fetched, the data is often stored in a register, such as a general purpose register (GPR), so that instructions can be performed with the data. The fetch process is often designed to be as fast as possible in three respects. First, the delivery of the data to the GPR should be fast. Second, the delivery of a valid indication that the fetch has found the intended data from memory and delivered it should be fast. This indication is often referred to as a data_valid indication. Third, the delivery of a concluding signal (“finish”) that a load/store unit (LSU) is done processing the fetch in all respects should be fast. This finish signal indicates that the address was good, the translation was good, no error occurred, etc., with respect to the fetch.
Many processing systems attempt to make the second aspect, the data_valid response time, as short as possible. When the data_valid arrives back at an issue sequencing unit (ISU), it is known that any younger instructions that are dependent on the result of this load (using the data as an operand) can now issue. There are distinct advantages to this, especially that the shorter the data_valid indication, the less time spent for dependent instruction to wait in the ISU queues. A more empty ISU queue means a smaller footprint, the ability to hold new to-be-issued instructions, and faster timing due a smaller footprint.
However, going too fast, or the sending the data_valid back too early, may skip over condition checks that are important to block data_valid, and were previously able to be contained in a design with a later data_valid. One such condition is called a “partial hit.”
Fetching data into a cache is typically broken up into fetching subsections of an entire cacheline in a cache one at a time. These subsections are known as sectors. A partial hit is the condition where a fetch has reached the point of bringing back at least one data sector for a fetch, and now another load has launched that wants to use one of the data sectors that has not arrived yet. This scenario can result in a reject for the load looking for the missing sector because the data_valid has not yet been delivered.
In some instances, the second load may encounter a situation where a data_valid has been sent, but the data for the second load is not good (i.e., the correct sector has not arrived yet). The only recourse the processing system can take is to flush out the dependent operations that have consumed this errant data, because these operations were issued but received incorrect data. Flushes are very disruptive to the smooth flow of a program.